Embodiments of the inventive concept relate to a semiconductor memory device, and more particularly, to a semiconductor memory device including a power decoupling capacitor (PDC).
According to an increase of a degree of integration of a semiconductor memory device, such as dynamic random access memory (DRAM), demands for high storage capacity and high operation speed of the semiconductor memory device have increased. Also, the semiconductor memory device may include capacitors providing various functions.
When the degree of integration of the semiconductor memory device is increased, the number of operation circuits may be proportionally increased, and noise may be momentarily generated in an external power voltage VDD and a ground voltage VSS during read and write operations. Accordingly, the semiconductor memory device can include a PDC to filter noise between VDD and VSS. However, the effective capacitance of the PDC may be reduced in a high frequency operation.